this is information on a product in full production. february 2015 docid025014 rev 1 1/9 ESDARF02-1BU2CK single-line bidirectional esd protection for high speed interface datasheet ? production data figure 1. functional diagram (top view) features ? bidirectional device ? extra low diode capacitance: 0.2 pf ? low leakage current ? 0201 smd package size compatible ? ultra small pcb area: 0.18 mm 2 ? ecopack ? 2 and rohs compliant component complies with the following standards: ? iec 61000-4-2 level 4 ? 15 kv (air discharge) ? 8 kv (contact discharge) applications where transient overvoltage protection in esd sensitive equipment is required, such as: ? smartphones, mobile phone and accessories ? tablet pcs, netbooks and notebooks ? portable multimedia devices and accessories ? digital cameras and camcorders ? communication and highly integrated systems description the ESDARF02-1BU2CK is a bidirectional single line tvs diode designed to protect the data lines or other i/o ports against esd transients. the device is ideal for applications where both reduced line capacitance and board space saving are required. pin1 available in different shapes st0201 package pin1 www.st.com
characteristics ESDARF02-1BU2CK 2/9 docid025014 rev 1 1 characteristics note: for a surge greater than the maximum values, the diode will fail in short-circuit figure 2. electrical characteristics (definitions) table 1. absolute maximum ratings (t amb = 25 c) symbol parameter value unit v pp peak pulse voltage: iec 61000-4-2 contact discharge iec 61000-4-2 air discharge 8 20 kv p pp peak pulse power (8/20 s) 20 w i pp peak pulse current (8/20 s) 1.5 a t j operating junction temperature range - 40 to +150 c t stg storage temperature range - 65 to +150 c t l maximum lead temperature for soldering during 10 s 260 c symbol parameter v = breakdown voltage i = leakage current @ v v = stand-off voltage i = peak pulse current c = parasite capacitance r br rm rm rm pp d = dynamic impedance t = voltage temperature coefficient table 2. electrical characteristics (values, t amb = 25 c) symbol test condition min. typ. max. unit v br i r = 1 ma 5 6.6 v i rm v rm = 3.6 v 5 100 na v cl i pp = 1 a, 8/20 a 10 12 v r d dynamic resistance, pulse duration 100 ns 1.3 c line f = (200 mhz- 3000 mhz), v r = 0 v 0.2 0.3 pf
docid025014 rev 1 3/9 ESDARF02-1BU2CK characteristics 9 figure 3. leakage current versus junction temperature (typical values) figure 4. junction capacitance versus frequency (typical values) 1 10 100 25 50 75 100 125 150 v r = v rm = 3.6 v i/o / gnd t j (c) i r (na) 0,0 0,1 0,2 0,3 0,4 0,5 1,00 10,00 100,00 1000,00 f(mhz) c(pf) t j = 25 c v osc = 30mv direct reverse figure 5. esd response to iec 61000-4-2 (+8 kv contact discharge) figure 6. esd response to iec 61000-4-2 (-8 kv contact discharge) 50 v/div 20 ns/div 242 v 1 19 v 2 17 v 3 15 v 4 v : esd peak voltage pp v :clamping voltage at 30 ns cl v :clamping voltage at 60 ns cl v :clamping voltage at 100 ns cl 1 2 3 4 50 v/div -241 v 1 -20 v 2 -16 v 3 -12 v 4 v : esd peak voltage pp v :clamping voltage at 30 ns cl v :clamping voltage at 60 ns cl v :clamping voltage at 100 ns cl 1 2 3 4 20 ns/div figure 7. s21 attenuation measurement results figure 8. tlp measurements db 10 m 30 m 100 m 300 m 1 g 3 g 10 g -1.5 -1.4 -1.3 -1.2 -1.1 -1 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 ESDARF02-1BU2CK f (hz) 0 35 5 40 15 50 20 55 10 45 25 60 30 0 5 10 15 20 25 positive polarity negative polarity i pp (a) v cl (v)
package information ESDARF02-1BU2CK 4/9 docid025014 rev 1 2 package information ? epoxy meets ul94, v0 ? bar indicates pin 1 in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. figure 9. st0201 package outline table 3. 0201 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.23 0.28 0.33 0.0091 0.0110 0.0130 b1 0.20 0.25 0.30 0.0079 0.0098 0.0118 b2 0.20 0.25 0.30 0.0079 0.0098 0.0118 d 0.25 0.30 0.35 0.0099 0.0118 0.0138 e 0.55 0.60 0.65 0.0217 0.0236 0.0256 e 0.35 0.0138 l1 0.13 0.18 0.23 0.0052 0.0071 0.0091 l2 0.14 0.19 0.24 0.0055 0.0075 0.0095 e d a l1 l1 l2 l2 e e b2 b2 b1 b1 to p side bottom pin 1 available in different forms pin 1 bottom
docid025014 rev 1 5/9 ESDARF02-1BU2CK package information 9 note: product marking may be rotated by 180 for assembly plant differentiation. in no case should this product marking be used to orient the component for its placement on a pcb. only pin 1 mark is to be used for this purpose. figure 12. tape and reel outline figure 10. footprint, dimensions in mm (inches) figure 11. marking 0.243 (0.0096) 0.170 (0.0067) 0.300 (0.0118) 0.243 (0.0096) 0.656 (0.0258) pin2 pin 1 z3 bar indicates pin 1 user direction of unreeling all dimensions are typical values in mm 4.0 2.0 2.0 8.0 0.67 1.75 3.5 ? 1.55 0.34 0.38 0.22 z3 z3 z3 z3 z3 z3
recommendation on pcb assembly ESDARF02-1BU2CK 6/9 docid025014 rev 1 3 recommendation on pcb assembly 3.1 stencil opening design figure 13. recommended stencil windows-opening 90%/thickness 80m (all dimensions are in mm) 3.2 solder paste 1. halide-free flux qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste is recommended. 3. offers a high tack force to resist component displacement during pcb movement. 4. use solder paste with fine particles: type4 (powder particle size is 20-45 m). 0.230 (0.0091) 0.183 (0.0072) 0.170 (0.0067) 0.300 (0.0118) 0.285 (0.0112) 0.656 (0.0258) 0.643 (0.0253) footprint stencil window 0.007 (0.00027) 0.007 (0.00027) 0.008 (0.0003) 0.008 (0.0003) mm (inches) 0.243 (0.0096)
docid025014 rev 1 7/9 ESDARF02-1BU2CK recommendation on pcb assembly 9 3.3 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead rec ognition capabilities of th e placement system, not the outline centering 3. standard tolerance of 0.05 mm is recommended. 4. 1.0 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb (all the more on flexible pcb) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 3.4 pcb design preference 1. to control the solder paste amount, the closed via is recommended instead of open vias. 2. the position of tracks a nd open vias in the solder area should be well balanced. the symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 3.5 reflow profile figure 14. st ecopack? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. maximum soldering profile corresponds to the latest ipc/jedec j-std-020. 250 0 50 100 150 200 240 210 180 150 120 90 60 30 300 270 - 6c/s 240-245 c 2 - 3 c/s temperature (c) -2 c/s -3 c/s time (s) 0.9 c/s 60 sec (90 max)
ordering information ESDARF02-1BU2CK 8/9 docid025014 rev 1 4 ordering information figure 15. ordering information scheme 5 revision history table 4. ordering information order code marking weight base qty delivery mode ESDARF02-1BU2CK z3 (1) 1. the marking can be rotated by 180 to differentiate assembly location 0.124 mg 15000 tape and reel esda rf 02 - 1b u2 ck esda array application rf antenna number of lines direction b = bidirectional package u2 = st0201 c = low clamping esd protection table 5. document revision history date revision changes 25-feb-2015 1 initial release.
docid025014 rev 1 9/9 ESDARF02-1BU2CK 9 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved
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